Regionales Rechenzentrum Erlangen (RRZE)

Beschreibung:Regionales Rechenzentrum Erlangen (RRZE)
Martensstraße 1
91058 Erlangen


(SPP 1648: Software for Exascale Computing):
ESSEX - Equipping Sparse Solvers for Exascale
Dr. Georg Hager; Prof. Dr. Gerhard Wellein
(01.11.2012 - 30.06.2019)

Publikationen (Download BibTeX)

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Schmitt, J., Köstler, H., Eitzinger, J., & Membarth, R. (2018). Unified Code Generation for the Parallel Computation of Pairwise Interactions using Partial Evaluation. In IEEE (Eds.), Proceedings of the 17th International Symposium on Parallel and Distributed Computing (ISPDC) (pp. 17-24). Geneva, CH.
Kreutzer, M., Ernst, D., Bishop, A.R., Fehske, H., Hager, G., Nakajima, K., & Wellein, G. (2018). Chebyshev filter diagonalization on modern manycore processors and GPGPUs. Springer Verlag.
Wittmann, M., Haag, V., Zeiser, T., Köstler, H., & Wellein, G. (2018). Lattice Boltzmann benchmark kernels as a testbed for performance analysis. Computers & Fluids, 172, 582-592.
Hofmann, J., Hager, G., & Fey, D. (2018). On the Accuracy and Usefulness of Analytic Energy Models for Contemporary Multicore Processors. In High Performance Computing: 33rd International Conference, ISC High Performance 2018 (pp. 22-43). Frankfurt: Cham: Springer International Publishing.
Laukemann, J., Hammer, J., Hofmann, J., Hager, G., & Wellein, G. (2018). Automated Instruction Stream Throughput Prediction for Intel and AMD Microarchitectures. In 2018 IEEE/ACM Performance Modeling, Benchmarking and Simulation of High Performance Computer Systems (PMBS) (pp. 121-131). Dallas, TX, US: IEEE.
Shahzad, F., Thies, J., Kreutzer, M., Zeiser, T., Hager, G., & Wellein, G. (2018). CRAFT: A library for easier application-level Checkpoint/Restart and Automatic Fault Tolerance. IEEE Transactions on Parallel and Distributed Systems.
Wittmann, M., Hager, G., Janalik, R., Lanser, M., Klawonn, A., Rheinbach, O.,... Wellein, G. (2018). Multicore Performance Engineering of Sparse Triangular Solves Using a Modified Roofline Model. In 2018 30TH INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING (SBAC-PAD 2018) (pp. 233-241). Lyon, FR: NEW YORK: IEEE.
Schmitt, J., Köstler, H., Eitzinger, J., Membarth, R., & Pérard-Gayot, A. (2018). Unified Code Generation for the Parallel Computation of Pairwise Interactions using Partial Evaluation. Poster presentation at International Symposium on Computational Science at Scale (CoSaS), Erlangen.
Wiese, W. (2017). Pirate Rogue: Das WordPress Theme der Piratenpartei Deutschland. Entwickler Magazin, Entwickler Magazin Spezial Vol. 14: WordPress(14), 100.
Heidig, T., Zeiser, T., & Freund, H. (2017). Influence of Resolution of Rasterized Geometries on Porosity and Specific Surface Area Exemplified for Model Geometries of Porous Media. Transport in Porous Media, 120(1), 207–225.
Hammer, J., Gaukler, M., Kanzler, P., Hörauf, P., & Novac, D. (2017). FAU FabLab: A Fabrication Laboratory for Scientists, Students, Entrepreneurs and the Curious.
Hofmann, J., Fey, D., Riedmann, M., Eitzinger, J., Hager, G., & Wellein, G. (2017). Performance analysis of the Kahan-enhanced scalar product on current multi-core and many-core processors. Concurrency and Computation-Practice & Experience, 29(9).
Galgon, M., Krämer, L., Lang, B., Alvermann, A., Fehske, H., Pieper, A.,... Thies, J. (2017). Improved coefficients for polynomial filtering in ESSEX. (pp. 63-79). Springer Verlag.
Röhl, T., Eitzinger, J., Hager, G., & Wellein, G. (2017). LIKWID monitoring stack: A flexible framework enabling job specific performance monitoring for the masses. (pp. 781-784). Institute of Electrical and Electronics Engineers Inc..
Hammer, J., Eitzinger, J., Hager, G., & Wellein, G. (2017). Kerncraft: A Tool for Analytic Performance Modeling of Loop Kernels. In Niethammer C, Gracia J, Hilbrich T, Knüpfer A, Resch MM, Nagel WE (Eds.), Tools for High Performance Computing 2016 (pp. 1--22). Stuttgart, Germany: Cham: Springer International Publishing.
Hofmann, J., Hager, G., Wellein, G., & Fey, D. (2017). An Analysis of Core- and Chip-Level Architectural Features in Four Generations of Intel Server Processors. In High Performance Computing. ISC 2017. Lecture Notes in Computer Science, vol 10266. Frankfurt: Cham: Springer.
Filiposka, S., Łapacz, R., Balcerkiewicz, M., Wein, F., & Sobieski, J. (2017). Transforming silos to next-generation services. In IEEE EUROCON 2017 - 17th International Conference on Smart Technologies (pp. 745-750).
Wellein, G., Alvermann, A., Fehske, H., Hager, G., Kreutzer, M., Lang, B.,... Galgon, M. (2016). High-performance implementation of Chebyshev filter diagonalization for interior eigenvalue computations. Journal of Computational Physics, 325, 226-243.
Wiese, W. (2016). Back to School. Entwickler Magazin, entwickler spezial WordPress(10), 100.
Bauer, S., Mohr, M., Rüde, U., Weißmüller, J., Wittmann, M., & Wohlmuth, B.I. (2016). A two-scale approach for efficient on-the-fly operator assembly in massively parallel high performance multigrid codes.

Zusätzliche Publikationen (Download BibTeX)

Pieper, A., Schubert, G., Wellein, G., & Fehske, H. (2013). Effects of disorder and contacts on transport through graphene nanoribbons. Physical Review B, 88, 195409.

Zuletzt aktualisiert 2016-05-05 um 04:58