Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)


Description:

Die Forschungsgebiete des Lehrstuhls
umfassen alle Aspekte des systematischen Entwurfs (CAD) eingebetteter
Systeme, speziell die Arbeitsgebiete Ablaufplanung (Scheduling),
Entwurfsraum-
exploration, Simulation, Synthese und Codegenerierung.
Untersucht werden innovative, adaptive und massiv parallele
Rechnerstrukturen, sowie Spezial- und Multiprozessoren und deren
Programmierung,
als auch die Entwicklung von Methoden und Werkzeugen
wie Simulatoren, Compiler und Prototypen. Einen weiteren Schwerpunkt
bilden diskrete Optimierungsmethoden, insbesondere lokale und globale
Suchverfahren, lineare Programmierung, Mehrzieloptimierungsverfahren und
deren Anwendung im Kontext
der optimalen Auslegung technischer Systeme.

Address:
Cauerstraße 11
91058 Erlangen



Subordinate Organisational Units

Juniorprofessur für Informatik
Professur für Informatik (Effiziente Algorithmen und Kombinatorische Optimierung)


Research Fields

Architecture and Compiler Design
Effiziente Algorithmen und Kombinatorische Optimierung
Reconfigurable Computing
System-Level Design Automation


Related Project(s)

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SHARE: SHARE at FAU
Prof. Dr.-Ing. Jürgen Teich
(01/08/2018 - 31/07/2020)


(DFG Priority Programme (SPP) 2037 - Scalable Data Management for Future Hardware):
ReProVide: Query Optimisation and Near-Data Processing on Reconfigurable SoCs for Big Data Analysis
Prof. Dr.-Ing. Klaus Meyer-Wegener; Dr.-Ing. Stefan Wildermann; Prof. Dr.-Ing. Jürgen Teich
(28/08/2017 - 31/08/2020)


HighPerMeshes: Domänenspezifische Programmierung und zielplattformbewusste Compiler-Infrastruktur für Algorithmen auf unstrukturierten Gittern
PD Dr.-Ing. Frank Hannig
(01/04/2017 - 31/03/2020)


AConFPGA: Approximate Computing on FPGAs
Prof. Dr.-Ing. Jürgen Teich
(13/03/2017)


(TRR 89: Invasive Computing):
TCPA_INT: Integration and Coupling of Tightly Coupled Processor Arrays (T01)
PD Dr.-Ing. Frank Hannig; Prof. Dr.-Ing. Jürgen Teich
(01/03/2017 - 29/02/2020)



Publications (Download BibTeX)

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Becher, A., & Teich, J. (2019). In situ Statistics Generation within partially reconfigurable Hardware Accelerators for Query Processing. In Proceedings of the 15th International Workshop on Data Management on New Hardware (DaMoN) Held with ACM SIGMOD/PODS 2019. Amsterdam, NL.
Letras, M., Falk, J., Schwarzer, T., & Teich, J. (2019). On the Analytic Evaluation of Schedules via Max-Plus Algebra for DSE of Multi-Core Architectures. In Proceedings of the 22st International Workshop on Software and Compilers for Embedded Systems, SCOPES 2019, Sankt Goar, Germany (pp. 1-9). Sankt Goar, Germany, DE: ACM.
Groth, S., Schmitt, C., Teich, J., & Hannig, F. (2019). SYCL Code Generation for Multigrid Methods. In Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems (SCOPES) (pp. 41-44). Sankt Goar, DE: ACM.
Fickenscher, J., Hannig, F., & Teich, J. (2019). DSL-based Acceleration of Automotive Environment Perception and Mapping Algorithms for embedded CPUs, GPUs, and FPGAs. In Martin Schoeberl, Christian Hochberger, Sascha Uhrig, Jürgen Brehm, Thilo Pionteck (Eds.), Architecture of Computing Systems -- ARCS 2019 (pp. 71 - 86). Copenhagen, DK: Cham: Springer International Publishing.
Roloff, S., Hannig, F., & Teich, J. (2019). Modeling and Simulation of Invasive Applications and Architectures. Singapore: Springer.
Schwarzer, T., Falk, J., Müller, S., Letras, M., Heidorn, C., Wildermann, S., & Teich, J. (2019). Compilation of Dataflow Applications for Multi-Cores using Adaptive Multi-Objective Optimization. ACM Transactions on Design Automation of Electronic Systems, 24(3). https://dx.doi.org/10.1145/3310249
Qiao, B., Reiche, O., Hannig, F., & Teich, J. (2019). From Loop Fusion to Kernel Fusion: A Domain-specific Approach to Locality Optimization. In Proceedings of the 2019 IEEE/ACM International Symposium on Code Generation and Optimization (pp. 242-253). Washington DC, USA, US.
Brand, M., Witterauf, M., Sousa, É., Tanase, A.-P., Hannig, F., & Teich, J. (2019). *-Predictable MPSoC Execution of Real-Time Control Applications Using Invasive Computing. Concurrency and Computation-Practice & Experience. https://dx.doi.org/10.1002/cpe.5149
Membarth, R., Dutta, H., Hannig, F., & Teich, J. (2019). Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards. In Transactions on High-Performance Embedded Architectures and Compilers V. (pp. 1-20). Springer.
Pourmohseni, B., Wildermann, S., Glaß, M., & Teich, J. (2019). Hard Real-Time Application Mapping Reconfiguration for NoC-Based Many-Core Systems. Real-Time Systems, 1-37. https://dx.doi.org/10.1007/s11241-019-09326-y
Echavarria Gutiérrez, J.A., Morales-Reyes, A., Cumplido, R., Salido, M., & Feregrino, C. (2019). IP-Cores Watermarking Scheme at Behavioral Level Using Genetic Algorithms. Engineering Applications of Artificial Intelligence.
Gabriel, D., Stechele, W., & Wildermann, S. (2019). Resource-aware parameter tuning for real-time applications. In Martin Schoeberl, Thilo Pionteck, Sascha Uhrig, Jürgen Brehm, Christian Hochberger (Eds.), Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (pp. 45-55). Copenhagen, DK: Springer Verlag.
Schmitt, C. (2019). A Domain-Specific Language and Source-to-Source Compilation Framework for Geometric Multigrid Methods (Dissertation).
Smirnov, F., Pourmohseni, B., Glaß, M., & Teich, J. (2019). Variety-Aware Routing Encoding for Efficient Design Space Exploration of Automotive Communication Networks. In Proceedings of the 5th International Conference on Vehicle Technology and Intelligent Transport Systems (VEHITS). Heraklion, Kreta, GR.
Brand, M., Hannig, F., & Teich, J. (2019). Anytime Instructions for Programmable Accuracy Floating-Point Arithmetic. In ACM (Eds.), Proceedings of the ACM International Conference on Computing Frontiers 2019 (pp. 215 - 219). Alghero, Sardinia, IT.
Teich, J., & Fummi, F. (Eds.) (2019). Proceedings of Design, Automation and Test in Europe Conference and Exhibition, Florence, Italy, March 25-29, 2019. .
Özkan, M.A., Reiche, O., Qiao, B., Membarth, R., Teich, J., & Hannig, F. (2019). Synthesizing High-Performance Image Processing Applications with Hipacc. In Proceedings of the Demo at the University Booth at Design, Automation and Test in Europe (DATE). Florence, IT.
Pourmohseni, B., Smirnov, F., Wildermann, S., & Teich, J. (2019). Isolation-Aware Timing Analysis and Design Space Exploration for Predictable and Composable Many-Core Systems. In Proceedings of the 31th Euromicro Conference on Real-Time Systems (ECRTS'19) (pp. (accepted)). Stuttgart, Germany.
Hochradel, K., Häcker, T., Hohler, T., Becher, A., Wildermann, S., & Sutor, A. (2019). Three-dimensional localization of bats: visual and acoustical. IEEE Sensors Journal, 1-1. https://dx.doi.org/10.1109/JSEN.2019.2907399
Becher, A., Herrmann, A., Wildermann, S., & Teich, J. (2019). ReProVide: Towards Utilizing Heterogeneous Partially Reconfigurable Architectures for Near-Memory Data Processing. In Gesellschaft für Informatik, Bonn (Eds.), Proceedings of the 1st Workshop on Novel Data Management Ideas on Heterogeneous (Co-)Processors (NoDMC) (pp. 51-70). Universität Rostock, DE: Bonn: Gesellschaft für Informatik.


Publications in addition (Download BibTeX)


Lari, V. (2016). Invasive Tightly Coupled Processor Arrays. In Springer book series on Computer Architecture and Design Methodologies Singapore: Springer.
Streubühr, M., Rosales, R., Hasholzner, R., Haubelt, C., & Teich, J. (2011). ESL Power and Performance Estimation for Heterogeneous MPSoCs Using SystemC. In Forum on specification and Design Languages 2011 (pp. 202-209). Oldenbúrg, DE.
Wasza, J., Bauer, S., Haase, S., Schmid, M., Reichert, S., & Hornegger, J. (2011). RITK: The Range Imaging Toolkit - A Framework for 3-D Range Image Stream Processing. In Eisert Peter, Hornegger Joachim, Polthier Konrad (Eds.), VMV 2011: Vision, Modeling & Visualization (pp. 57-64). Berlin, DE.
Kiesel, R., Löhlein, O., Terzis, A., Streubühr, M., Haubelt, C., & Teich, J. (2010). Actor-oriented Modeling of Driver Assistance Systems for Efficient Multi-Core ECU Implementation. In Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (pp. 117-126). Dresden, DE.
Niemann, B., & Haubelt, C. (2006). Formalizing TLM with Communicating State Machines. In Proceedings Forum on Specification and Design Languages (FDL'06) (pp. 285-292). Darmstadt, DE.
Niemann, B., & Haubelt, C. (2006). Assertion-Based Verification of Transaction Level Models. In Proceedings of the 9th ITG/GMM/GI Workshop, Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (pp. 232-236). Dresden, DE.
Haubelt, C. (2005). Automatic Model-Based Design Space Exploration for Embedded Systems - A System Level Approach (Dissertation).
Haubelt, C. (2004). Design Space Exploration for Distributed Hardware Reconfigurable Systems. In Jürgen Becker, Marco Platzner, and Serge Vernalde (Eds.), Field-Programmable Logic and Applications (pp. 1171). Berlin, Heidelberg: Springer.

Last updated on 2019-24-04 at 10:18