Juniorprofessur für Informatik

Address:
Martensstraße 3
91058 Erlangen


Related Project(s)


GEFA: Ganzheitlicher Entwurf von Fahrerassistenzsystemen im Automobilbereich
Prof. Dr.-Ing. Michael Glaß; Prof. Dr.-Ing. Jürgen Teich
(01/04/2014 - 31/12/2014)


INI.FAU: Integral Safety Architecture – Modelling, Analysis, Optimization, and Variant Management
Prof. Dr.-Ing. Michael Glaß; Prof. Dr.-Ing. Jürgen Teich
(01/02/2012 - 31/01/2015)


HLESI: High-Level-Modellierung von Bus-Controllern und -Systemen in der Automatisierungstechnik
Prof. Dr.-Ing. Michael Glaß; Prof. Dr.-Ing. Jürgen Teich
(01/02/2010 - 31/03/2013)


SEIS: Sicherheit in eingebetteten IP-basierten Systemen
Prof. Dr.-Ing. Michael Glaß; Prof. Dr.-Ing. Jürgen Teich
(01/01/2009 - 30/06/2012)



Publications (Download BibTeX)

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Keszöcze, O., & Harris, I.G. (2019). Chatbot-based assertion generation from natural language specifications. In Proceedings of the Forum on Specification & Design Languages. Southampton, GB.
Keszöcze, O., Soeken, M., & Drechsler, R. (2018). Computational Complexity of Error Metrics in Approximate Computing. In Bernd Steinbach (Eds.), Further Improvements in the Boolean Domain (pp. Cambridge Scholars Publishing).
Keszöcze, O., Wille, R., & Drechsler, R. (2018). Exact Design of Digital Microfluidic Biochips. Springer.
Keszöcze, O., Schmitz, K., Schloeter, J., & Drechsler, R. (2018). Improving SAT Solving Using Monte Carlo Tree Search-based Clause Learning. In Rolf Drechsler, Mathias Soeken (Eds.), Advanced Boolean Techniques - Selected Papers from the 13th International Workshop on Boolean Problems. Springer.
Khosravi, F., Glaß, M., & Teich, J. (2017). Automatic Reliability Analysis in the Presence of Probabilistic Common Cause Failures. IEEE Transactions on Reliability, 66(2), 319-338. https://dx.doi.org/10.1109/TR.2016.2638320
Smirnov, F., Glaß, M., Reimann, F., & Teich, J. (2017). Optimizing Message Routing and Scheduling in Automotive Mixed-Criticality Time-Triggered Networks. In Proceedings of 54th ACM/EDAC/IEEE Design Automation Conference (DAC 2017) (pp. 6). Austin, US.
Ha, S., Teich, J., Haubelt, C., Glaß, M., Mitra, T., Dömer, R.,... Bhattacharyya, S.S. (2017). Introduction to Hardware/Software Codesign. In Ha S, Teich J (Eds.), Handbook of Hardware/Software Codesign (pp. 3-26). Dordrecht, The Netherlands: Springer.
Glaß, M., Teich, J., Lukasiewycz, M., & Reimann, F. (2017). Hybrid Optimization Techniques for System-Level Design Space Exploration. In Ha S, Teich J (Eds.), Handbook of Hardware/Software Codesign (pp. 217-246). Dordrecht, The Netherlands: Springer.
Li, Z., Park, H., Malik, A., Wang, K.I.-K., Salcic, Z., Kuzmin, B.,... Teich, J. (2017). Using Design Space Exploration for Finding Schedules with Guaranteed Reaction Times of Synchronous Programs on Multi-core Architecture. Journal of Systems Architecture, 74, 30-45.
Borgonovo, E., Aliee, H., Glaß, M., & Teich, J. (2016). A New Time-Independent Reliability Importance Measure. European Journal of Operational Research. https://dx.doi.org/10.1016/j.ejor.2016.03.054
Weichslgartner, A., Wildermann, S., Götzfried, J., Freiling, F., Glaß, M., & Teich, J. (2016). Design-Time/Run-Time Mapping of Security-Critical Applications in Heterogeneous MPSoCs. In In Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems (SCOPES) (pp. 153-162). St. Goar, DE.
Roloff, S., Pöppl, A., Schwarzer, T., Wildermann, S., Baader, M., Glaß, M.,... Teich, J. (2016). ActorX10: An Actor Library for X10. In Proceedings of the 6th ACM SIGPLAN X10 Workshop (X10) (pp. 24-29). Santa Barbara, CA, US.
Keszöcze, O., & Wille, R. (2016). Exploiting Electronic Design Automation for Checking Legal Regulations: A Vision. In Frank Oppenheimer, Julio Luis Medina Pasaje (Eds.), Languages, Design Methods, and Tools for Electronic System Design (pp. 101 - 112).
Wang, B., Xu, Y., Hasholzner, R., Drewes, C., Rosales, R., Graf, S.,... Teich, J. (2016). Exploration of Power Domain Partitioning for Application-Specific SoCs in System-Level Design. In In Proceedings of the 19. GI/ITG/GMM-Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2016) (pp. 102-113). Freiburg, DE.
Falk, J., Schwarzer, T., Glaß, M., Teich, J., Zebelein, C., & Haubelt, C. (2015). Quasi-static scheduling of data flow graphs in the presence of limited channel capacities. Institute of Electrical and Electronics Engineers Inc..
Graf, S., Glaß, M., Teich, J., & Platte, D. (2015). A Methodology for the Optimized Design of an E/E Architecture Component Platform. In Proceedings of the Stuttgart International Symposium (pp. 203-215). Stuttgart, DE.
Aliee, H., Borgonovo, E., Glaß, M., & Teich, J. (2015). Importance measures in time-dependent reliability analysis and system design. In Proceedings of the Annual European Safety and Reliability Conference (ESREL '15) (pp. 1089-1094). Zürich, CH: CRC Press/Balkema.
Aliee, H., Glaß, M., Chen, L., Ebrahimi, M., Khosravi, F., Kleeberger, V.B.,... Weis, C. (2015). Application-aware cross-layer reliability analysis and optimization. it - Information Technology, 57(3), 159-169. https://dx.doi.org/10.1515/itit-2014-1080
Graf, S., Glaß, M., & Teich, J. (2015). Symbolic Message Routing for Multi-Objective Optimization of Automotive E/E Architecture Component Platforms. In Proceedings of 18. Workshop Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV 2015) (pp. 115-124). Chemnitz, DE.
Schwarzer, T., Falk, J., Glaß, M., Teich, J., Zebelein, C., & Haubelt, C. (2015). Throughput-optimizing compilation of dataflow applications for multi-cores using quasi-static scheduling. In Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems (SCOPES) (pp. 68-75). St. Goar, DE: Association for Computing Machinery, Inc.

Last updated on 2019-24-04 at 10:19