Parallel Processing Letters

ISSN: 0129-6264
Verlag: World Scientific Publishing Co


Heftnummer: 4, Band: 28
Reconfigurable Hardware Generation of Multigrid Solvers with Conjugate Gradient Coarse-Grid Solution (2018)
Schmitt C, Schmid M, Kuckuk S, et al.

Heftnummer: 3, Band: 24
Experiments on Optimizing the Performance of Stencil Codes with SPL Conqueror (2014)
Grebhahn A, Kuckuk S, Schmitt C, et al.

Heftnummer: 04, Band: 23, Seitenbereich: 1340011-1340030
A survey of checkpoint/restart techniques on distributed memory systems (2013)
Shahzad F, Wittmann M, Kreutzer M, et al.

Heftnummer: 3, Band: 21, Seitenbereich: 339-358
Hybrid-parallel sparse matrix-vector multiplication with explicit communication overlap on current multicore-based systems. (2011)
Hager G, Wellein G, Schubert G, et al.

Heftnummer: 4, Band: 20, Seitenbereich: 359-376
Leveraging shared caches for parallel temporal blocking of stencil codes on multicore processors and clusters (2010)
Wittmann M, Hager G, Eitzinger J, et al.

Heftnummer: 4, Band: 19, Seitenbereich: 491-511
Benchmark analysis and application results for lattice Boltzmann simulations on NEC SX vector and Intel Nehalem systems (2009)
Zeiser T, Hager G, Wellein G

Heftnummer: 4, Band: 18, Seitenbereich: 471-490
Data access characteristics and optimizations for SUN ULTRASPARC T2 AND T2+ systems (2008)
Hager G, Zeiser T, Wellein G

Heftnummer: 4, Band: 13, Seitenbereich: 549-560
Optimization and Profiling of the Cache Performance of Parallel Lattice Boltzmann Codes (2003)
Pohl T, Kowarschik M, Wilke J, et al.

Zuletzt aktualisiert 2014-11-12 um 07:18