High-Level Synthesis for Hardware/Software Co-Design of Distributed Smart Camera Systems - Streit, Franz-Josef; Letras, Martin; Schid, Matthias; Falk, Joachim; Wildermann, Stefan; Teich, Jürgen (ACM Proceedings of the 11th International Conference on Distributed Smart Cameras, 2017)
In this paper, we present a holistic design methodology for em- bedded smart camera networks consisting of FPGA-based Pro- grammable System-on-Chips (PSoCs). Beginning with a high-level model of a distributed smart camera application specified in Mat- lab/Simulink, a behavioral data-flow-based SystemC model is auto- matically generated. In turn, every vertex of the data-flow graph rep- resents a functional task of the application and can be implemented either as a software or a hardware component on PSoC nodes within the smart camera network. Also, such hardware/software designs for data-intensive camera applications require a sophisticated hard- ware/software interconnect. These design decisions on mapping tasks and communication influence throughput but also the costs of the distributed smart camera network. Our methodology varies communication routing and task map- ping within a camera network to optimize several objectives si- multaneously. Particularly, we use Design Space Exploration (DSE) to explore the trade-off between resource costs and throughput in a smart camera application realized as a heterogeneous hard- ware/software system. In this context, High-Level Synthesis (HLS) constitutes an important mechanism to estimate the functional properties of different hardware design candidates automatically. Furthermore, it enables a semi-automatic synthesis of the smart camera implementation candidate. As a case study, we apply our methodology to a high-bandwidth multi-camera system consist- ing of PSoC nodes, which apply feature-based image registration techniques to combine multiple images with an overlapping field- of-view to produce a panoramic vie
Keywords: High-Level Synthesis; Camera Network; Design Space Exploration