Double Inspection for Run-Time Loop Parallelization - Philippsen, Michael; Tilmann, Nikolai; Brinkers, Daniel (Languages and Compilers for Parallel Computing, 24th International Workshop, LCPC 2011, 2013)
The Inspector/Executor is well-known for parallelizing loops with irregular access patterns that cannot be analyzed statically. The downsides of existing inspectors are that it is hard to amortize their high run-time overheads by actually executing the loop in parallel, that they can only be applied to loops with dependencies that do not change during their execution and that they are often specifically designed for array codes and are in general not applicable in object oriented just-in-time compilation. In this paper we present an inspector that inspects a loop twice to detect if it is fully parallelizable. It works for arbitrary memory access patterns, is conservative as it notices if changing data dependencies would cause errors in a potential parallel execution, and most importantly, as it is designed for current multicore architectures it is fast - despite of its double inspection effort: it pays off at its first use. On benchmarks we can amortize the inspection overhead and outperform the sequential version from 2 or 3 cores onward. © 2013 Springer-Verlag.
UnivIS-Import:2015-04-16:Pub.2014.tech.IMMD.IMMD2.simult
Keywords: multi-core; parallelization; compilers; program analysis

Implementation of multigrid on QPACE - Bolten, Mathias; Brinkers, Daniel; Rüde, Ulrich; Stürmer, Markus (Cluster Computing, 2011 IEEE International Conference on, 2011)
We developed and optimized a multigrid method on the QPACE cluster. The QPACE cluster is an acclerator-based cluster using the Power Cell 8i CPU that is built by the special research field SFB TR 55 for Lattice Quantum Chromo dynamics computations. The cluster uses a custom 3D to rus network build using FPGAs. Our goal was to evaluate the QPACE architecture for a type of algorithm that uses a communication pattern not limited to nearest neighbor communication. We provide a model of the communication network taking into account the specific characteristics of the network and the network processor. For the implementation we chose to use an accelerator-centric programming model by using the SPUs, only.
UnivIS-Import:2015-04-16:Pub.2013.tech.IMMD.lsinfs.implem

Simultaneous inspection: Hiding the overhead of inspector-executor style dynamic parallelization - Brinkers, Daniel; Philippsen, Michael; Veldema, Ronald (Languages and Compilers for Parallel Computing, 27th International Workshop, LCPC 2014, 2015)
A common approach for dynamic parallelization of loops at runtime is the inspector-executor pattern. The inspector first runs the loop without any (side) effects to analyze whether there are data dependences that would prevent parallel execution. Only if no such dependences are found, does the executor phase actually run the loop iterations in parallel. In previous works, the overhead of the inspection must either be amortized by the parallel execution or is completely wasted if the loop turns out to be non-parallelizable. In this paper we propose to run the inspection phase simultaneous to an instrumented sequential version of the loop. This way we can reduce and hide the overhead in case of a non-parallelizable loop. We discuss what needs to be done so that the sequentially executed iterations do not invalidate the inspector’s concurrent work (in which case sequential execution is needed for the whole loop). Our measurements show that if a loop cannot be executed in parallel there is an overhead below 1.6 % compared to the runtime of the original sequential loop. If the loop is parallelizable, we see speedups of up to a factor of 3.6 on a quad core processor.
UnivIS-Import:2015-04-16:Pub.2013.tech.IMMD.IMMD2.double
Keywords: multi-core; parallelization; compilers; program analysis