Benchmark Generation for Timing Analysis - Wägemann, Peter; Distler, Tobias; Eichler, Christian; Schröder-Preikschat, Wolfgang (Proceedings of the 23rd Real-Time and Embedded Technology and Applications Symposium (RTAS '17), 2017)
UnivIS-Import:2017-12-18:Pub.2017.tech.IMMD.IMMD4.benchm

Demo Abstract: Tooling Support for Benchmarking Timing Analysis - Eichler, Christian; Wägemann, Peter; Distler, Tobias; Schröder-Preikschat, Wolfgang (Proceedings of the 23rd Real-Time and Embedded Technology and Applications Symposium, Demo Session (RTAS Demo '17), 2017)
UnivIS-Import:2017-12-18:Pub.2017.tech.IMMD.IMMD4.demoab

GenEE: A Benchmark Generator for Static Analysis Tools of Energy-Constrained Cyber-Physical Systems - Eichler, Christian; Wägemann, Peter; Schröder-Preikschat, Wolfgang (CPS-IoTBench 2019 - Proceedings of the 2019 2nd Workshop on Benchmarking Cyber-Physical Systems and Internet of Things, 2019)
To guarantee the safe completion of a specific task in an energy-constrained (i.e., battery-operated, energy-harvesting) cyber-physical system (CPS), information on the task's worst-case energy consumption (WCEC) is necessary. To determine upper bounds on the WCEC, analysis tools conducting static program-code analysis make sound but conservative assumptions on the program's dynamic behavior. When using existing source-code benchmarks, knowledge of their possible program paths and thus their dynamic behaviors are not available. This lack of knowledge leads to missing baselines, which prevents comprehensive evaluations of the accuracy of WCEC analyzers, that is, the difference between the actual WCEC and analyzer's reported upper bound is unknown. In this paper, we present GENEE, a benchmark generator that enables in-depth evaluations of WCEC analysis tools for energy-constrained CPSs. GENEE combines small program blocks in a way such that all necessary characteristics of the benchmark are available after the generation process together with the benchmark. Since peripherals (e.g., transceivers) are of major importance when analyzing the energy consumption of CPSs, GENEE generates benchmarks that (de-)activate these components while tracking all possible dynamic behavior. Evaluations with our open-source prototype of GENEE on an ARM Cortex-M4 platform show that the generator produces programs with device interactions and known characteristics, most importantly, the program's actual WCEC.
CRIS-Team Scopus Importer:2019-06-04
Keywords: Benchmark generation; Cyber-physical systems; Energy constraints; Static code analysis; Worst-case energy consumption (WCEC)

Invasive Computing - Anantharajaiah, Nidhi; Asfour, Tamim; Bader, Michael; Bauer, Lars; Becker, Jürgen; Bischof, Simon; Brand, Marcel; Bungartz, Hans-Joachim; Eichler, Christian; Esper, Khalil; Falk, Joachim; Fasfous, Nael; et al. (FAU University Press, 2022)

Invasive Run-Time Support System (iRTSS) - Bauer, Lars; Henkel, Jörg; Hönig, Timo; Schröder-Preikschat, Wolfgang; Eichler, Christian; Gonzalez, Jeferson; Herzog, Benedict; Langer, Tobias; Maier, Sebastian; Rabenstein, Jonas; Raffeck, Phillip; Schmaus, Florian (Invasive Computing, 2022)
Invasive programs, as well as hardware designed specifically to run them, need an operating system that does not make applications pay for resources, functions or features that are not needed in operation. With this in mind, we provide in the following methods, principles and abstractions for the application-aware extension, configuration and adaptation of invasive computing systems. These are technically integrated into an invasive run-time support system (iRTSS), a highly scalable heterogeneous operating system that comes in various forms and ports (LEON, x86-64, AMD64, ARM64) depending on the use case. The system addresses special-purpose MPSoC-based as well as general-purpose multicore/manycore machine
Keywords: InvasIC; iRTSS; OctoPOS; Agent System

LLWM & IR-Mark: Integrating Software Watermarks into an LLVM-based Framework - Novac, Daniela; Eichler, Christian; Philippsen, Michael (Checkmate '21: Proceedings of the 2021 Research on offensive and defensive techniques in the Context of Man At The End (MATE) Attacks, 2021)
While software protection mechanisms, such as DRM and online services, hinder the unrestrained duplication of games and applications, these mechanisms fail at protecting individual software components from reuse by intellectual property thieves. While conceptually watermarking can discourage software misuse and allows proof of ownership, embedding watermarks requires expert knowledge. This is why software watermarks are barely used. This paper presents LLWM, an LLVM-based watermarking framework that automates the embedding of watermarks and thus enables the widespread use of watermarking. LLWM incorporates several (adapted) implementations of existing watermarking techniques and provides the foundation for IR-Mark, a new watermarking technique based on a modified register allocation. With LLWM, built upon LLVM and its compiler Clang, developers can use a watermark simply by compiling their codes, without the obstacle of having to understand and run existing methods and standalone tools. With the methods included in LLWM, we offer a variety of choices for embedding techniques and evaluate and discuss their characteristics and resilience against common attack
Keywords: software watermark; watermarking; framework; compiler; LLVM; LLWM; IR-Mark

Neverlast: Towards the design and implementation of the NVM-based everlasting operating system - Eichler, Christian; Hofmeier, Henriette; Reif, Stefan; Hönig, Timo; Nolte, Jörg; Schröder-Preikschat, Wolfgang (Proceedings of the Annual Hawaii International Conference on System Sciences, 2021)
Novel non-volatile memory (NVM) technologies allow for the efficient implementation of “intermittently-powered” smart dust and edge computing systems in a previously unfamiliar way. Operating with rough environmental conditions where power-supply failures occur often requires adjustments to all parts of the system. This leads to an inevitable trade-off in the design of operating systems-the overhead of persisting the achieved computation progress over power failures is detrimental to the possible amount of progress with the available energy budgets. It is, therefore, crucial to minimize the overhead of ensuring persistence. This paper presents the case that persistence should be provided as an operating-system service to achieve everlasting operating capabilities. Triggered by power-failure interrupts, an implicit persistence service for the processor status of a process preserves progress on the CPU-instruction level. This interrupt only triggers if necessary so that no power-state polling is needed. We outline architectures for everlasting systems and discuss their benefits and drawbacks compared to existing approaches. Thereby, the operating system provides persistence as a service at run-time to the application, with minimal overhead. Our approach enables the separation of the application from energy-supply state estimation, as well as state-preserving logic for software and hardware components.
CRIS-Team Scopus Importer:2021-07-02

Taming Non-Deterministic Low-Level I/O: Predictable Multi-Core Real-Time Systems by SoC Co-Design - Vaas, Steffen; Ulbrich, Peter; Eichler, Christian; Wägemann, Peter; Reichenbach, Marc; Fey, Dietmar (2021 IEEE 24th International Symposium on Real-Time Distributed Computing (ISORC), 2021)

TASKers: A Whole-System Generator for Benchmarking Real-Time-System Analyses - Eichler, Christian; Wägemann, Peter; Distler, Tobias; Ulbrich, Peter; Schröder-Preikschat, Wolfgang (18th International Workshop on Worst-Case Execution Time Analysis (WCET 2018), 2018)

Worst-case energy-consumption analysis by microarchitecture-aware timing analysis for device-driven cyber-physical systems - Raffeck, Phillip; Eichler, Christian; Wägemann, Peter; Schröder-Preikschat, Wolfgang (OpenAccess Series in Informatics, 2019)
Many energy-constrained cyber-physical systems require both timeliness and the execution of tasks within given energy budgets. That is, besides knowledge on worst-case execution time (WCET), the worst-case energy consumption (WCEC) of operations is essential. Unfortunately, WCET analysis approaches are not directly applicable for deriving WCEC bounds in device-driven cyber-physical systems: For example, a single memory operation can lead to a significant power-consumption increase when thereby switching on a device (e.g., transceiver, actuator) in the embedded system. However, as we demonstrate in this paper, existing approaches from microarchitecture-aware timing analysis (i.e., considering cache and pipeline effects) are beneficial for determining WCEC bounds: We extended our framework on whole-system analysis with microarchitecture-aware timing modeling to precisely account for the execution time that devices are kept (in)active. Our evaluations based on a benchmark generator, which is able to output benchmarks with known baselines (i.e., actual WCET and actual WCEC), and an ARM Cortex-M4 platform validate that the approach significantly reduces analysis pessimism in whole-system WCEC analyses.
CRIS-Team Scopus Importer:2019-07-26
Keywords: Michroarchitecture analysis; WCEC; WCET; WCRE; Whole-system analysis