A Classification and Comparative Overview of State-of-the-Art Analog Linearization Techniques for Integrated CMOS Power Amplifiers - Zohny, Amr; Rascher, Jochen; Fischer, Georg; Weigel, Robert; Ußmüller, Thomas (IEEE International Conference on Wireless Information Technology and Systems - ICWITS 2012, 2012)
In order to conform to the latest mobile communication standards, highly-linear power amplifiers (PA) are required. This is a challenge since high power added efficiency (PAE) is also needed for long battery life which dictates operating close to saturation where amplitude and phase nonlinearities are dominant. Thus linearization is necessary to simultaneously improve average efficiency and linearity [1]. Traditional linearization techniques such as feedback and feedforward suffer from bandwidth limitations and efficiency degradation respectively. Furthermore, digital predistortion (DPD) techniques are integrable albeit suffering from high system complexity [2]. State-of-the-art analog linearization techniques however solve many of these problems. The aim of this paper is to propose a classification of these techniques as shown in section II. In addition, section III shows a comparative overview of these techniques. Utilizing that classification and comparative study, the proper deep submicron (DSM) CMOS on-chip linearization techniques for handsets are then identified for modern communication standards.
elib2cris::1512001600,zohny2012a
Keywords: Power Amplifier; Linearity; PAE; CMOS; Predistortion

A Comparative Overview of High Power Handling CMOS Switches and their Recent Applications in RF Front-Ends - Rascher, Jochen; Zohny, Amr; Glock, Stefan; Fischer, Georg; Weigel, Robert; Ußmüller, Thomas (14th Annual Wireless and Microwave Technology Conference (WAMICON), 2013)
In this publication techniques for high power handling capability (PHC) of RF switches in bulk CMOS are investigated and compared. Together with high isolation approaches these allow reconfigurable power amplifiers (PAs) or radio front-ends for Watt level communication standards. Special care is taken to assess the applicability of the solutions for monolithic integration in scaled CMOS processes. Results are shown with PHC as high as 34dBm in a 32nm CMOS process. Recent applications for the switches in front-ends or reconfigurable PAs are analyzed. They show large DC current reduction in back-off with stage bypassing and load adaptation concepts. Up to 50% DC current reduction for low output power is reported. This greatly improves the average PA efficiency for varying envelope signals without the efforts of more advanced solutions like envelope tracking.
elib2cris::1512001600,rascher2013

A Comparison of State-of-the-Art Efficiency Enhancement Techniques of Fully Integrated CMOS Power Amplifiers for Handset LTE Applications - Zohny, Amr; Rascher, Jochen; Weigel, Robert; Ußmüller, Thomas (International Conference on Wireless Information Technology and Systems, 2013)
Among the significant remaining challenges of complete transceiver integration for handset applications is the implementation of high-efficiency power amplifiers (PA) in CMOS. This challenge is exacerbated by the high crest factors of the signals utilized in WCDMA and LTE standards. The first aim of this paper is to identify the shortcomings of the traditional efficiency enhancement techniques in dealing with LTE in CMOS. In addition, an investigation of state-ofthe- art implemented efficiency enhancement methods is performed. Moreover, a comparative overview of the aforementioned techniques is presented to provide guidelines for high-efficiency CMOS LTE PA. This is accomplished while identifying the bottlenecks for the future LTE upgrades. Finally, the performances of the investigated techniques for CMOS are compared with other technologies to assay the commercial suitability of CMOS PA for LTE.
elib2cris::1512001600,zohny2013
Keywords: Power amplifier; Power-added efficiency; linearity; CMOS; long-term evolution; peak-to-average power ration

Analog Compensation of AM-AM and AM-PM effects for HighEfficiency Stacked-FET Power Amplifiers in 65-nm Standard CMOS - Zohny, Amr; Leuschner, Stephan; Rascher, Jochen; Pinarello, Sandro; Ußmüller, Thomas; Müller, Jan-Erik; Fischer, Georg; Weigel, Robert (European Microwave Integrated Circuits Conference (EuMIC), 2013)
Simultaneously achieving high linearity and high power-added efficiency (PAE) is essential for power amplifiers (PA) operating with modern communication signals. The challenge is exacerbated by the low breakdown voltages of standard CMOS realizations. This work presents a low-complexity programmable analog scheme to compensate the strong AM-AM and AM-PM nonlinearities of the high-ruggedness stacked-cascode topology while maintaining high PAE. The proposed solution utilizes standard NMOS devices to achieve peak PAE of 60% at the 900 MHz band from a 3V supply. The compensation scheme manages to improve the output 1-dB compression point by up to 2 dB and keep the AM-PM variation within 5 degrees. The proposed method improves the linear output power (@ ACPR= -40 dBc) for a Class-AB power amplifier by up to 1.5 dB without compromising PAE or saturated output power
elib2cris::1512001600,zohny2013a
Keywords: Power amplifier; Stacked FET; Stacked cascode; CMOS; linearization; ruggedness

High Precision Local Positioning for Wireless Industry Automation - Zohny, Amr; Ferizi, Alban; Rose, Richard; Weigel, Robert (Embedded World Conference 2011, 2011)
Wireless local positioning systems (WLPS) are currently becoming more entrenched in several elds. Among their most prominent elds of implementations are smart factories and real-time based active mapping for cultural guiding purposes. The development of such systems began with the realization of the positioning core technology. However, as this technology matured, more abstract system aspects materialized as the forthcoming challenge such as infrastructure demands in terms of ranging capabilities, cell requirements regarding bandwidth and most importantly, the energy obligations of the mobile unit. A popular solution to these system demands presents itself as the frequency modulated continuous wave (FMCW) radar technique. The aim of this paper is to discuss its underlying principle, the latest and most recent improvements in this system architecture
elib2cris::1512001600,zohny2011
Keywords: radar; local positioning; radio position measurement; industry automation

Integrated Reconfigurable CMOS Power Amplifiers - Rascher, Jochen; Zohny, Amr; Weigel, Robert (European Microwave Conference (EuMC), 2013)
Technologies for Embedded Wireless Systems Workshop
elib2cris::1512001600,rascher2013a

Simulation and Implementation Demands for State-of-the-Art Integrated Linear Power Amplifiers - Zohny, Amr; Rascher, Jochen; Weigel, Robert (Electrical and Electronic Engineering for Communication EEEfCOM 2012, 2012)
elib2cris::1512001600,zohny2012
Keywords: Linearity; Power Amplifier; CMOS; ACPR; Intermodulation

Techniques for Reconfigurable Integrated Power Amplifiers with RF Switches - Rascher, Jochen; Zohny, Amr; Weigel, Robert (Electric and Electronic Engineering for Communication Workshop (EEEfCOM), 2012)
elib2cris::1512001600,rascher2012a

Time-Efficient Adjacent Channel Power Ratio Simulation utilizing Overlap-add Signal Decomposition for UMTS Power Amplifiers - Zohny, Amr; Leuschner, Stephan; Kastner, M.; Rascher, Jochen; Ußmüller, Thomas; Müller, Jan-Erik; Fischer, Georg; Weigel, Robert (Asia-Pacific Microwave Conference - APMC 2012, 2012)
The suitability of an RF power amplifier (PA) for modern sophisticated modulation schemes demands high linearity. One of the most significant figures of merit concerning PA linearity is its adjacent channel power ratio (ACPR). The aim of this paper is to propose a time-efficient simulation procedure for ACPR which conforms with the latest 3GPP TS 25.101 specifications for its calculation. This procedure overcomes the time penalty associated with the traditional envelope-based simulation method. The approach is based on standard harmonic balance (HB) tools with MATLAB post-processing incorporating the Overlap-add (OLA) signal decomposition DSP technique for fast RRC filtering. In addition, the simulation results are compared with measurements of a commercial WCDMA PA for verification. Accuracies of better than 0.5dB and 1.1dB are achieved up to 10dB and 2dB backoff respectively.
elib2cris::1512001600,zohny2012b
Keywords: Power Amplifier; Linearity; ACPR; WCDMA; Distortion; Harmonic Balance