Aspect-Aware Operating System Development - Lohmann, Daniel; Hofer, Wanja; Schröder-Preikschat, Wolfgang; Spinczyk, Olaf (Proceedings of the 10th International Conference on Aspect-Oriented Software Development (AOSD 2011), 2011)
The domain of operating systems has often been mentioned as an "ideal candidate" for the application of AOP; fundamental policies we find in these systems, such as synchronization or preemption, seem to be inherently cross-cutting in their implementation. Their clear separation into dedicated aspect modules should facilitate better evolvability and - the focus of this paper - configurability. Our experience with applying AOP to the domain of highly configurable embedded operating systems has shown, however, that these advantages can by no means be taken for granted. To reveal maximum configurability of central system policies, aspects and their potential interactions with the system have to be taken into account much earlier, that is, "from the very beginning". We propose the analysis and design process of aspect-aware development, which leads to such an "aspect- friendly" system structure and demonstrate its feasibility on the example of CiAO, an AUTOSAR-OS-compliant operating system that provides configurability of all fundamental system policies by means of AOP.
UnivIS-Import:2015-04-16:Pub.2011.tech.IMMD.IMMD4.aspect
Keywords: CiAO; AOP; Aspect-Oriented Programming; AspectC++; Operating Systems; Embedded Systems; VAMOS

CiAO: An Aspect-Oriented Operating-System Family for Resource-Constrained Embedded Systems - Lohmann, Daniel; Hofer, Wanja; Schröder-Preikschat, Wolfgang; et al. (Proceedings of the 2009 USENIX Annual Technical Conference (USENIX 2009), 2009)
UnivIS-Import:2015-04-16:Pub.2009.tech.IMMD.IMMD4.ciaoan
Keywords: CiAO; AOP; Aspect-Oriented Programming; AspectC++; Operating Systems; Embedded Systems

Concern Impact Analysis in Configurable System Software - The AUTOSAR OS Case - Hofer, Wanja; Lohmann, Daniel; Schröder-Preikschat, Wolfgang (Proceedings of the 7th Workshop on Aspects, Components, and Patterns in Infrastructure Software (ACP4IS 2008), 2008)
System software for cost-sensitive special purpose-systems has to be configurable and tailorable. AOSD should be beneficial for this purpose, as it provides means to untangle the system's concerns in a very fine-grained way. An important prerequisite for a fine-grained software design based on aspects is, however, that all concerns and their interactions present in the system have been comprehensively captured and understood. We propose a method called Concern Impact Analysis for this purpose. Based on a system's specification, CIA provides a guideline to iteratively grasp the concerns present in a system, and their interactions. A speciality of CIA is that it also takes unspecified internal concerns into consideration as early as possible. We have tested CIA with the AUTOSAR OS specification and the design of our CiAO operating system family, where it led to a very fine-grained, aspect-aware kernel design. Copyright © 2008 ACM.
UnivIS-Import:2015-04-16:Pub.2008.tech.IMMD.IMMD4.concer
Keywords: Aspect-Oriented Design; AOP; AOSD; CiAO; Configurability; AUTOSAR; Aspect-Aware Operating System

Configurable Memory Protection by Aspects - Lohmann, Daniel; Hofer, Wanja; Spinczyk, Olaf; Schröder-Preikschat, Wolfgang; et al. (Proceedings of the 4th Workshop on Programming Languages and Operating Systems (PLOS 2007), 2007)
We describe the implementation of memory protection by means of aspect-oriented programming (AOP) in CiAO, an AUTOSAR-like family of embedded operating systems. The use of AOP was originally motivated by the fact that memory protection is a cross-cutting policy, which, furthermore, has to be configurable at build-time in AUTOSAR. We learned, however, that besides switching between full protection and no protection, an AOP-based approach also makes it easy to apply completely different models of protection. For the domain of statically configured embedded systems, where certain failure scenarios can often be excluded by means of code analysis or even probability, this facilitates tailored and light-weight "nav-as-vou-use" protection strateaies Copyright 2007 ACM.
UnivIS-Import:2015-04-16:Pub.2007.tech.IMMD.IMMD4.config
Keywords: Aspect-Oriented Programming (AOP); AspectC++; CiAO; Configurability; Aspect-Aware Operating System; Memory Protection

Egs: A Cortex-M3-Based Mote Platform - Ko, JeongGil; Wang, Qiang; Schmid, Thomas; Hofer, Wanja; Dutta, Prabal; Terzis, Andreas (Proceedings of the Demo Session of the 7th IEEE Communications Society Conference on Sensor, Mesh and Ad Hoc Communication and Networks (SECON-Demo 2010), 2010)
We introduce the Egs mote platform based on the Cortex M3 microcontroller that focuses on medical sensing applications. Egs uses an Atmel SAM3U microcontroller that runs up to 96 MHz and has up to 52 KB of RAM and 256 KB of Flash. Egs combines this microcontroller with two radios (802.15.4 and Bluetooth), external flash, on board sensors, and a LCD touchscreen to enable a rich set of wireless sensing applications. © 2010 IEEE.
UnivIS-Import:2015-04-16:Pub.2010.tech.IMMD.IMMD4.egsaco
Keywords: Wireless Sensor Networks; Mote Platform; ARM Cortex-M3; TinyOS

Leviathan: SPL Support on Filesystem Level - Hofer, Wanja; Elsner, Christoph; Blendinger, Frank; Schröder-Preikschat, Wolfgang; Lohmann, Daniel (Proceedings of the 14th International Software Product Line Conference (SPLC-Poster 2010), 2010)
A lot of configurable software, especially in the domain of embedded and operating systems, is configured with a source preprocessor, mostly to avoid run-time overhead. However, developers then have to face a myriad of preprocessor directives and the corresponding complexity in the source code, even when they might only be working on the implementation of a single feature at a time. Thus, it has long been recognized that tool support is needed to cope with this '#ifdef hell'. Current approaches, which assist the software developer by providing preprocessed views, are all bound to a special integrated development environment. This eliminates them from being used both in industry settings (where domain-specific toolchains are often mandated) and in open-source projects (where diverse sets of editors and tools are being used). © 2010 Springer-Verlag Berlin Heidelberg.
UnivIS-Import:2015-04-16:Pub.2010.tech.IMMD.IMMD4.leviat
Keywords: Leviathan; Software Product Lines; Variability Implementation; Preprocessor-Based Configuration; Toolchain-Independent Variability Support; Filesystem Views; VAMOS

Low Power or High Performance? A Tradeoff Whose Time Has Come (and Nearly Gone) - Ko, Jeonggil; Klues, Kevin; Richter, Christian; Hofer, Wanja; Kusy, Branislav; Bruenig, Michael; Schmid, Thomas; Wang, Qiang; Dutta, Prabal; Terzis, Andreas (Proceedings of the 9th European Conference on Wireless Sensor Networks (EWSN 2012), 2012)
Some have argued that the dichotomy between high-performance operation and low resource utilization is false - an artifact that will soon succumb to Moore's Law and careful engineering. If such claims prove to be true, then the traditional 8/16- vs. 32-bit power-performance tradeoffs become irrelevant, at least for some low-power embedded systems. We explore the veracity of this thesis using the 32-bit ARM Cortex-M3 microprocessor and find quite substantial progress but not deliverance. The Cortex-M3, compared to 8/16-bit microcontrollers, reduces latency and energy consumption for computationally intensive tasks as well as achieves near parity on code density. However, it still incurs a ∼2x overhead in power draw for "traditional" sense-store-send-sleep applications. These results suggest that while 32-bit processors are not yet ready for applications with very tight power requirements, they are poised for adoption everywhere else. Moore's Law may yet prevail. © 2012 Springer-Verlag.
UnivIS-Import:2015-04-16:Pub.2012.tech.IMMD.IMMD4.lowpow
Keywords: Wireless Sensor Networks; Mote Platform; ARM Cortex-M3; TinyOS

Parallel, Hardware-Supported Interrupt Handling in an Event-Triggered Real-Time Operating System - Scheler, Fabian; Hofer, Wanja; Oechslein, Benjamin; Schröder-Preikschat, Wolfgang; Lohmann, Daniel; et al. (Proceedings of the 2009 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES 2009), 2009)
A common problem in event-triggered real-time systems is caused by low-priority tasks that are implemented as interrupt handlers interrupting and disturbing high-priority tasks that are implemented as threads. This problem is termed rate-monotonic priority inversion, and current software-based solutions are restricted in terms of more sophisticated scheduler features as demanded for instance by the AUTOSAR embedded-operating-system specification. We propose a hardware-based approach that makes use of a coprocessor to eliminate the potential priority inversion. By evaluating a prototypical implementation, we show that our approach both overcomes the restrictions of software approaches and introduces only a slight processing overhead in exchange for increased predictability. Copyright 2009 ACM.
UnivIS-Import:2015-04-16:Pub.2009.tech.IMMD.IMMD4.parall
Keywords: CiAO; Real-Time Systems; Priority-Driven; Rate-Monotonic Priority Inversion; TriCore; Interrupt Handling

Safer Sloth: Efficient, Hardware-Tailored Memory Protection - Danner, Daniel; Müller, Rainer; Schröder-Preikschat, Wolfgang; Hofer, Wanja; Lohmann, Daniel (Proceedings of the 20th Real-Time and Embedded Technology and Applications Symposium (RTAS '14), 2014)
UnivIS-Import:2015-04-16:Pub.2014.tech.IMMD.IMMD4.safers
Keywords: Sloth; Operating Systems; Embedded Systems; Real-Time Systems; Interrupt Handling; Safety; Memory Protection; MPU; OSEK; AUTOSAR; Infineon TriCore

Sleepy Sloth: Threads as Interrupts as Threads - Hofer, Wanja; Lohmann, Daniel; Schröder-Preikschat, Wolfgang (Proceedings of the 32nd IEEE Real-Time Systems Symposium (RTSS 2011), 2011)
Event latency is considered to be one of the most important properties when selecting an event-driven real-time operating system. This is why in previous work on the SLOTH kernel, we suggested treating threads as ISRs-executing all application code in an interrupt context-and thereby reducing event latencies by scheduling and dispatching solely in hardware. However, to achieve these benefits, SLOTH does not support blocking threads or ISRs, but requires all control flows to have run-to-completion semantics. In this paper, we present SLEEPY SLOTH, an extension of SLOTH that provides a new generalized thread abstraction that overcomes this limitation, while still letting the hardware do all scheduling and dispatching. SLEEPY SLOTH abolishes the (artificial) distinction between threads and ISRs: Threads can be dispatched as efficiently as interrupt handlers and interrupt handlers can be scheduled as flexibly as threads. Our SLEEPY SLOTH implementation of the automotive OSEK OS standard provides much more flexibility to application developers while maintaining efficient execution of application control flows. SLEEPY SLOTH runs on commodity off-the-shelf hardware and outperforms a leading commercial OSEK implementation by a factor of 1.3 to 19. © 2011 IEEE.
UnivIS-Import:2015-04-16:Pub.2011.tech.IMMD.IMMD4.sleepy
Keywords: Sloth; Operating Systems; Embedded Systems; Real-Time Systems; Thread Management; Interrupt Handling; OSEK; Infineon TriCore; Priority-Driven Scheduling; Blocking Threads

Sloth: Let the Hardware Do the Work! - Hofer, Wanja; Lohmann, Daniel; Scheler, Fabian; Schröder-Preikschat, Wolfgang (Proceedings of the Work-in-Progress Session of the 22nd ACM Symposium on Operating Systems Principles (SOSP-WiP 2009), 2009)
UnivIS-Import:2015-04-16:Pub.2009.tech.IMMD.IMMD4.slothl
Keywords: Sloth; Threads; Interrupts; OSEK

Sloth on Time: Efficient Hardware-Based Scheduling for Time-Triggered RTOS - Hofer, Wanja; Danner, Daniel; Müller, Rainer; Scheler, Fabian; Schröder-Preikschat, Wolfgang; Lohmann, Daniel (Proceedings of the 33rd IEEE Real-Time Systems Symposium (RTSS 2012), 2012)
Traditional time-triggered operating systems are implemented by multiplexing a single hardware timer-the system timer-in software, having the kernel maintain dispatcher tables at run time. Our Sloth on Time approach proposes to make use of multiple timer cells as available on modern micro controller platforms to encapsulate dispatcher tables in the timer configuration, yielding low scheduling and dispatching latencies at run time. Sloth on Time instruments available timer cells in different roles to implement time-triggered task activation, deadline monitoring, and time synchronization, amongst others. By comparing the Sloth on Time kernel implementation to two commercial kernels, we show that our concept significantly reduces the overhead of time-triggered operating systems. The speed-ups in task dispatching that it achieves range up to a factor of 171x, and its dispatch latencies go as low as 14 clock cycles. Additionally, we demonstrate that Sloth on Time minimizes jitter and increases schedulability for its real-time applications, and that it avoids situations of priority inversion where traditional kernels fail by design. © 2012 IEEE.
UnivIS-Import:2015-04-16:Pub.2012.tech.IMMD.IMMD4.slotho
Keywords: Sloth; Operating Systems; Embedded Systems; Real-Time Systems; Interrupt Handling; Timers; Time-Triggered Scheduling; OSEK; AUTOSAR; Infineon TriCore

Sloth: The Virtue and Vice of Latency Hiding in Hardware-Centric Operating Systems - Hofer, Wanja (Friedrich-Alexander-Universität Erlangen-Nürnberg, 2014)
UnivIS-Import:2016-07-26:Pub.2014.tech.IMMD.IMMD4.slotht

Sloth: Threads as Interrupts - Hofer, Wanja; Lohmann, Daniel; Scheler, Fabian; Schröder-Preikschat, Wolfgang (Proceedings of the 30th IEEE Real-Time Systems Symposium (RTSS 2009), 2009)
Traditional operating systems differentiate between threads, which are managed by the kernel scheduler, and interrupt handlers, which are scheduled by the hardware. This approach is not only asymmetrical in its nature, but also introduces problems relevant to real-time systems because low-priority interrupt handlers can interrupt high-priority threads. We propose to internally design all threads as interrupts, thereby simplifying the managed control-flow abstractions and letting the hardware interrupt subsystem do most of the scheduling work. The resulting design of our very light-weight SLOTH system is suitable for the implementation of a wide class of embedded real-time systems, which we describe with the example of the OSEK-OS specification. We show that the design conciseness has a positive impact on the system performance, its memory footprint, and its overall maintainability. © 2009 IEEE.
UnivIS-Import:2015-04-16:Pub.2009.tech.IMMD.IMMD4.slotht
Keywords: Sloth; Operating Systems; Embedded Systems; Real-Time Systems; Thread Management; Interrupt Handling; OSEK; Infineon TriCore; Priority-Driven Scheduling; CiAO; VAMOS

The Aspect-Aware Design and Implementation of the CiAO Operating-System Family - Lohmann, Daniel; Spinczyk, Olaf; Hofer, Wanja; Schröder-Preikschat, Wolfgang (Lecture Notes in Computer Science, 2012)
CiAO is the first operating-system family that has been developed with AOP concepts from the very beginning. By its aspect-aware design and implementation, CiAO reaches excellent configurability, separation of concerns, and low footprints in the resulting systems that outperform leading commercial implementations. CiAO implements the automotive operating-system standard OSEK/AUTOSAR OS and provides configurability of all fundamental system properties by means of AOP. We describe the aspect-aware design approach and implementation idioms that led to this efficiency and flexibility. On the example of three larger case studies from CiAO, we demonstrate how AOP can be employed in this respect on different levels of complexity: From highly configurable, yet efficient low-level hardware abstractions over the implementation of central kernel policies up to the decomposition of a complete operating-system specification. Our results show that by a consequent application of the aspect-aware approach, AOP becomes a promising technology to reach configurability, separation of concerns, and runtime/memory efficiency on all levels of operating-system development. © Springer-Verlag Berlin Heidelberg 2012.
UnivIS-Import:2015-03-09:Pub.2012.tech.IMMD.IMMD4.aspect

Toolchain-Independent Variant Management with the Leviathan Filesystem - Hofer, Wanja; Elsner, Christoph; Blendinger, Frank; Schröder-Preikschat, Wolfgang; Lohmann, Daniel (Proceedings of the 2nd Workshop on Feature-Oriented Software Development (FOSD 2010), 2010)
Preprocessor-configured software needs tool support for the developer to be able to cope with the complexity introduced by optional and alternative code blocks in the source. Current approaches, which assist the software developer by providing preprocessed views, are all bound to a special integrated development environment. This eliminates them from being used both in industry settings (where domain-specific toolchains are often mandated) and in open-source projects (where diverse sets of editors and tools are being used and freedom of tool choice is crucial for the project success). We therefore propose to tackle the problem at a lower level by implementing variant views at the filesystem level. By mounting one or more variants using our Leviathan filesystem, we enable the use of standard tools such as syntax validators, code metric analysis tools, or arbitrary editors to view or modify a variant. The major benefit (and challenge) is the support for automatically writing back to the configurable code base when editing one of the mounted variant views. © 2010 ACM.
UnivIS-Import:2015-04-16:Pub.2010.tech.IMMD.IMMD4.toolch
Keywords: Leviathan; Software Product Lines; Variability Implementation; Preprocessor-Based Configuration; Toolchain-Independent Variability Support; Filesystem Views; Käsebrot; VAMOS; CiAO